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Final Electrical Specifications
LT1949-1 1.1MHz, 1A Switch PWM DC/DC Converter
June 2000
DESCRIPTIO
FEATURES
s s s s s s s s
1A, 0.5, 30V Internal Switch 1.1MHz Fixed Frequency Operation Operates with VIN as Low as 1.5V Low-Battery Detector Stays Active in Shutdown Low VCESAT Switch: 410mV at 800mA Pin-for-Pin Compatible with the LT1317B Uses Ceramic Capacitors Small 8-Lead MSOP Package
APPLICATIO S
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The LT (R)1949-1 is a fixed frequency step-up DC/DC converter with a 1A, 0.5 internal switch. Capable of generating 10V at 175mA from a 3.3V input, the LT1949-1 is ideal for generating bias voltages for large screen LCD panels. Constant frequency 1.1MHz operation results in a low noise output that is easy to filter and the 30V switch rating allows output voltage up to 28V using a single inductor. The high switching frequency allows the use of ceramic output capacitors. An external compensation pin gives the user flexibility in optimizing loop compensation, allowing small, low ESR ceramic capacitors to be used at the output. The 8-lead MSOP package ensures a low profile overall solution. The LT1949-1 includes a low-battery detector that stays alive when the device goes into shutdown. Quiescent current in shutdown is 50A, while operating current is 8mA.
, LTC and LT are registered trademarks of Linear Technology Corporation.
LCD Bias Supplies GPS Receivers Battery Backup Portable Electronic Equipment Diagnostic Medical Instrumentation
TYPICAL APPLICATIO
VIN 3.3V C1 3.3F CERAMIC SHUTDOWN VIN LT1949-1 SHDN VC 84.5k 50pF L1 4.7H
90
D1 SW
VOUT = 10V 80 70 EFFICIENCY (%)
VOUT 10V 175mA
R1 196k 1% FB GND 3pF
60 50 40
R2 28k 1%
C2 3.3F CERAMIC
30 20
C1, C2: TAIYO YUDEN LMK325BJ335MD D1: MBRM120LT3 L1: SUMIDA CLQ4D10-4R7
1949-1 F01
5
10
Figure 1. 3.3V to 10V/175mA DC/DC Converter
Figure 2. 3.3V to 10V Converter Efficiency
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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3.6VIN 4.2VIN 3VIN 50 100 LOAD CURRENT (mA) 300
1949-1 F02
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1
LT1949-1
ABSOLUTE
(Note 1)
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RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW VC FB SHDN GND 1 2 3 4 8 7 6 5 LBO LBI VIN SW
VIN, LBO Voltage ..................................................... 12V SW Voltage ............................................... - 0.4V to 30V FB Voltage .................................................... VIN + 0.3V VC Voltage ................................................................ 2V LBI Voltage ............................................ 0V VLBI 1V SHDN Voltage ........................................................... 6V Junction Temperature .......................................... 125C Operating Temperature Range (Note 2) ...-40C to 85C Storage Temperature ........................... - 65C to 150C Lead Temperature (Soldering, 10sec).................. 300C
ORDER PART NUMBER LT1949-1EMS8 MS8 PART MARKING LTQX
MS8 PACKAGE 8-LEAD PLASTIC MSOP
TJMAX = 125C, JA = 120C/W
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
SYMBOL IQ VFB IB gm AV PARAMETER Quiescent Current
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 2V, VSHDN = 2V unless otherwise noted.
CONDITIONS VSHDN = 0V Feedback Voltage
q q q
MIN
TYP 8 50
MAX 14 80 1.26 1.26 150 12 480
UNITS mA A V V nA V mhos V/V %
1.22 1.20 1.7 140 80 1 0.85
1.24 1.24 24 280 700 85 1.1 1.1 0.015 -5
FB Pin Bias Current (Note 3) Input Voltage Range Error Amp Transconductance Error Amp Voltage Gain Maximum Duty Cycle Switch Current Limit (Note 4) VIN = 2.5V, Duty Cycle = 30% I = 5A
q q q
q
1.5 1.35 0.1 - 14 210 220 0.25 100 120 3 400 6 0.4
fOSC
Switching Frequency Shutdown Pin Current LBI Threshold Voltage VSHDN = VIN VSHDN = 0V
q q q q
190 180
200 200 0.15 20 30 2000 0.01 410 270 0.08
LBO Output Low LBO Leakage Current LBI Input Bias Current (Note 5) Low-Battery Detector Gain Switch Leakage Current Switch VCESAT Reference Line Regulation SHDN Input Voltage High SHDN Input Voltage Low
ISINK = 10A VLBI = 250mV, VLBO = 5V VLBI = 150mV 1M Pull-Up VSW = 5V ISW = 800mA ISW = 500mA 1.8V VIN 12V
q q q
q q
q q
1.4
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT1949-1E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the - 40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls.
Note 3: Bias current flows into FB pin. Note 4: Switch current limit guaranteed by design and/or correlation to static tests. Duty cycle affects current limit due to ramp generator. Note 5: Bias current flows out of LBI pin.
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A MHz A A mV mV V nA nA V/V A mV mV %/V V V
W
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WW
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LT1949-1 TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency
1.3
1.3
OSCILLATOR FREQUENCY (MHz)
85C 25C
SWITCH CURRENT (A)
SWITCH CURRENT (A)
1.2
1.1 -40C
1.0
0.9
0
2
4 6 8 INPUT VOLTAGE (V)
Switch Voltage Drop (VCESAT)
1.0 1.25
QUIESCENT CURRENT (mA)
0.8 85C 25C 0.4 -40C 0.2
FEEDBACK VOLTAGE (V) SWITCH VOLTAGE (V)
0.6
0 0 0.2 0.4 0.6 0.8 SWITCH CURRENT (A) 1.0 1.2
Quiescent Current, SHDN = 0V
60 55
QUIESCENT CURRENT (A)
FB PIN BIAS CURRENT (nA)
50 45 40 35 30 -50
45 40 35 30 25 20 15
SHDN PIN CURRENT (A)
-25
0 25 50 TEMPERATURE (C)
UW
10 12
1949-1 G01 1949-1 G04
Switch Current Limit
1.3
Switch Current Limit, Duty Cycle = 30%
1.2
1.2
1.1
1.1
1.0
1.0
0.9
0.9
0.8 0 20 60 40 DUTY CYCLE (%) 80 100
1949-1 G02
0.8 -50
-25
0 25 50 TEMPERATURE (C)
75
100
1949-1 G03
Feedback Voltage
8.5 8.0
Quiescent Current, SHDN = 2V
1.24
7.5 7.0 6.5 6.0 5.5 5.0
1.23
1.22
1.21
1.20 -50
-25
0 25 50 TEMPERATURE (C)
75
100
4.5 -50
-25
0 25 50 TEMPERATURE (C)
75
100
1949-1 G05
1949-1 G06
FB Pin Bias Current
60 55 50
1 2
SHDN Pin Current
0
-2
-4
75
100
10 -50
-6
-25
0 25 50 TEMPERATURE (C)
75
100
0
1
2 4 3 SHDN PIN VOLTAGE (V)
5
6
1949-1 G09
1949-1 G07
1949-1 G08
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LT1949-1 TYPICAL PERFOR A CE CHARACTERISTICS
Transient Response
VOUT 100mV/DIV AC COUPLED
PI FU CTIO S
VC (Pin 1): Compensation Pin for Error Amplifier. Connect a series RC network from this pin to ground. Typical values for compensation are a 30k/330pF combination when using ceramic output capacitors. Minimize trace area at VC. FB (Pin 2): Feedback Pin. Reference voltage is 1.24V. Connect resistor divider tap here. Minimize trace area at FB. Set VOUT according to: VOUT = 1.24V(1 + R1/R2). SHDN (Pin 3): Shutdown. Pull this pin low for shutdown mode (only the low-battery detector remains active). Leave this pin floating or tie to a voltage between 1.4V and 6V to enable the device. SHDN pin is logic level and need only meet the logic specification (1.4V for high, 0.4V for low). GND (Pin 4): Ground. Connect directly to local ground plane. SW (Pin 5): Switch Pin. Connect inductor/diode here. Minimize trace area at this pin to keep EMI down. VIN (Pin 6): Supply Pin. Must be bypassed close to the pin. LBI (Pin 7): Low-Battery Detector Input. 200mV reference. Voltage on LBI must stay between ground and 700mV. Low-battery detector remains active in shutdown mode. LBO (Pin 8): Low-Battery Detector Output. Open collector, can sink 10A. A 1M pull-up is recommended.
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IL 500mA/DIV 20s/DIV VIN = 3.3V VOUT = 10V 40mA TO 140mA LOAD STEP CIRCUIT FIGURE 1
1949-1 G10
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LT1949-1
BLOCK DIAGRA
1.24V REFERENCE
VOUT BIAS R1 (EXTERNAL) FB RAMP GENERATOR
1.1MHz OSCILLATOR
Figure 3. LT1949-1 Block Diagram
OPERATIO
The LT1949-1 is a current mode, fixed frequency step-up DC/DC converter with an internal 1A NPN power transistor. Operation can best be understood by referring to the Block Diagram. At the beginning of each oscillator cycle, the flip-flop is set and the switch is turned on. Current in the switch ramps up until the voltage at A2's positive input reaches the VC pin voltage, causing A2's output to change state and the switch to be turned off. The signal at A2's positive input is a summation of a signal representing switch current and a ramp generator (introduced to avoid subharmonic oscillations at duty factors greater than 50%). If the load increases, VOUT (and FB) will drop slightly and the error amplifier will drive VC to a higher voltage, causing current in the switch to increase. In this way, the error amplifier drives the VC pin to the voltage necessary to satisfy the load. Frequency compensation is provided by an external series RC network connected between the VC pin and ground.
+
+ +
-
R2 (EXTERNAL)
W
LBI
+
FB 2 gm
VC 1 200mV ENABLE
7
+ -
A4
LBO 8
-
ERROR AMPLIFIER
+ -
SHDN SHUTDOWN 3
A1 COMPARATOR SW 5 FF R A2 COMPARATOR S Q DRIVER Q3
+
A=2 0.06
-
4 GND
1949-1 BD
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Layout Hints The LT1949-1 switches current at high speed, mandating careful attention to layout for proper performance. You will not get advertised performance with careless layouts. Figure 4 shows recommended component placement for a boost (step-up) converter. Follow this closely in your PC layout. Note the direct path of the switching loops. Input capacitor C1 must be placed close (< 5mm) to the IC package. As little as 10mm of wire or PC trace from CIN to VIN will cause problems such as inability to regulate or oscillation. The ground terminal of output capacitor C2 should tie close to Pin 4 of the LT1949-1. Doing this reduces dI/dt in the ground copper which keeps high frequency spikes to a minimum. The DC/DC converter ground should tie to the PC board ground plane at one place only, to avoid introducing dI/dt in the ground plane.
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LT1949-1
OPERATIO
APPLICATIO S I FOR ATIO
Low-Battery Detector
The LT1949-1's low-battery detector is a simple PNP input gain stage with an open collector NPN output. The negative input of the gain stage is tied internally to a 200mV 5% reference. The positive input is the LBI pin. Arrangement as a low-battery detector is straightforward.
3.3V R1 LBI R2 49.9k VIN LT1949-1 1M LBO TO PROCESSOR
+ -
200mV INTERNAL REFERENCE GND
1949-1 F05
R1 =
VLB - 200mV 4A
Figure 5. Setting Low-Battery Detector Trip Point
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GROUND PLANE LBI LBO C1 VIN 1 R1 2 R2 SHUTDOWN LT1949-1 3 4 MULTIPLE VIAs GND C2 VOUT 6 5 7 L1 8
1949-1 F04
Figure 4. Recommended Component Placement for Boost Converter. Note Direct High Current Paths Using Wide PC Traces. Minimize Trace Area at Pin 1 (VC) and Pin 2 (FB). Use Multiple Vias to Tie Pin 4 Copper to Ground Plane. Use Vias at One Location Only to Avoid Introducing Switching Currents into the Ground Plane
Figure 5 details hookup. R1 and R2 need only be low enough in value so that the bias current of the LBI pin doesn't cause large errors. For R2, 49.9k is adequate. The 200mV reference can also be accessed as shown in Figure 6. The low-battery detector remains active in shutdown.
200k 2N3906 VREF 200mV 10k LBO
VIN LT1949-1
+
10F
LBI GND
1949-1 F06
Figure 6. Accessing 200mV Reference
LT1949-1
TYPICAL APPLICATIO
VIN 4V TO 9V 1M C1 4.7F 16V 1M VIN
PACKAGE DESCRIPTIO
0.007 (0.18) 0.021 0.006 (0.53 0.015)
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
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4 Cell to 5V SEPIC Converter
C2 4.7F 16V L1 10H D1 VOUT 5V 250mA 100k 1% C3 10F 6.3V 33.2k 1% SW LT1949-1 SHDN VC 40.2k 330pF C1, C2: TAIYO YUDEN EMK316BJ475ML C3: TAIYO YUDEN JMK316BJ106ML D1: MOTOROLA MBRM120LT3 L1, L2: SUMIDA CR32-100KC
1949-1 TA02
L2 10H
FB GND
Dimensions in inches (millimeters) unless otherwise noted. MS8 Package 8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 0.004* (3.00 0.102)
8
76
5
0.193 0.006 (4.90 0.15)
0.118 0.004** (3.00 0.102)
1 0.040 0.006 (1.02 0.15) 0 - 6 TYP SEATING PLANE 0.012 (0.30) 0.0256 REF (0.65) BSC
23
4 0.034 0.004 (0.86 0.102)
0.006 0.004 (0.15 0.102)
MSOP (MS8) 1098
7
LT1949-1
TYPICAL APPLICATIO
VIN 3.3V VIN SHUTDOWN C1 4.7F SHDN
C1, C2, C5: TAIYO YUDEN LMK325BJ475MF C4, C6, C8: TAIYO YUDEN EMK316BJ105MF D1 TO D6: BAT-54S, DUAL DIODE D7: MBRM120LT3 L1: SUMIDA CLQ4D10-4R7
RELATED PARTS
PART NUMBER LT1302 LT1304 LT1307B LT1308B LT1317B LT1377 LT1613 LT1615 LT1930 LT1949 DESCRIPTION High Output Current Micropower DC/DC Converter 2-Cell Micropower DC/DC Converter Single Cell Micropower 600kHz PWM DC/DC Converter 2A 600kHz PWM DC/DC Converter Micropower, 600kHz PWM DC/DC Converter Monolithic 1MHz, 1.5A Switching Regulator Single Cell 1.4MHz PWM DC/DC Converter Micropower Boost Converter in SOT-23 1.2MHz Boost Converter in SOT-23 600kHz, 1A Switch PWM DC/DC Converter COMMENTS 5V/600mA from 2V, 2A Internal Switch, 200A IQ Low-Battery Detector Active in Shutdown 3.3V at 75mA from 1 Cell, MSOP Package 36V Switch, Fixed Frequency Operation, SO-8 and TSSOP Packages 2 Cells to 3.3V at 200mA, MSOP Package Regulates Positive or Negative Outputs, Ext Synchronization 3.3V to 5V at 200mA, SOT-23 Package IQ = 20A, < 1A in Shutdown, VOUT Up to 34V 1A, 36V Internal Switching, VIN = 2.6V to 16V 1A, 0.5, 30V Internal Switch, 8-Lead MSOP and SO Packages
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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Low Profile Triple Output LCD Bias Generator
D1 D2 D3 D4 23V 5mA C7 0.1F L1 4.7H C8 1F C9 0.1F C4 1F SW LT1949-1 FB VC R1 30.1k C3 330pF GND R3 7.5k C2 4.7F R2 40.2k C6 1F 8V 200mA D5 C5 4.7F D6 -8V 10mA
1949-1 TA02
19491i LT/TP 0600 4K * PRINTED IN THE USA
(c) LINEAR TECHNOLOGY CORPORATION 2000

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